I am Raghavendra Pradyumna Pothukuchi, an Associate Research Scientist in the Dept. of Computer Science (CS) at Yale University. I am an NSF/CRA Computing Innovation Fellow (class of 2021) and work with Prof. Abhishek Bhattacharjee and Prof. Jonathan Cohen (Princeton Neuroscience Institute) at the intersection of Quantum computing, Cognitive sciences and Computer systems. My research has two thrusts. The first is to develop computer systems, particularly quantum computing systems for emerging computational cognitive models such as those from quantum cognition. The second is to develop intelligent and efficient computer architectures inspired from the organization of computation in the brain. I also contributed to the ModECI Model Description Format(MDF), developing a translator for converting models specified in MDF to ONNX.
I received my PhD in CS from the University of Illinois at Urbana-Champaign (UIUC), advised by Prof. Josep Torrellas. My dissertation was on building intelligent systems for security and extreme-efficiency.
I have research interests in computer architecture and systems, quantum computing, cognitive sciences, security, control theory, machine learning, compilers, Operating System (OS)/Runtimes and distributed systems. I believe that system building is the best way to demonstrate computer system designs. I collaborated with researchers from several fields, prototyped my designs on real systems and also worked with industry to push my ideas into mainstream processors. Visit the Research page to know more about my work.
Prior to graduate school, I was an ASIC Design Engineer in the Physical Design Team at Nvidia Graphics, Bangalore, India. Before that, I earned my bachelors degree in Electrical and Electronics Engineering from Birla Institute of Technology & Science (BITS), Pilani, India, and was the university gold medalist.
My research on obfuscating power side channels using formal control has been selected as one of the 12 top picks in computer architecture for 2021.
My research on using formal control techniques for computer systems is published as a cover feature in IEEE Control Systems! The cover, also designed by me, can be viewed here.
Click to view my Curriculum Vitae (CV).
Awards and Honors
- IEEE Micro Top Picks in Computer Architecture, IEEE Micro, 2021
- NSF CRA Computing Innovation Fellow (CIFellow), Computing Research Association (CRA) and National Science Foundation (NSF), 2021-2023
- Swati and Mukul Chawla Scholarship, Parallaxes Capital, UIUC, 2020
- Cover feature, IEEE Control Systems, 2020
- W. J. Poppelbaum Award for architecture design creativity, Dept. of CS, UIUC 2018
- IEEE Computer Society Lance Stafford Larson Award, 2nd prize (2019) and 3rd prize (2018)
- Selected as 1 out of 6 Rising Stars in Computer Architecture, Georgia Institute of Technology 2018
- Mavis Future Faculty Fellow, College of Engineering, UIUC 2017
- Winner, ACM Student Research Competition, PACT (International conference on Parallel Architectures and Compilation Techniques) 2017
- Certificate in Foundations of Teaching, Center for Innovation in Teaching and Learning, UIUC 2017
- Best Paper Award nominee, PACT (International conference on Parallel Architectures and Compilation Techniques) 2017
- Best Graduating Student, Prof. L. K. Maheshwari foundation, BITS Pilani 2011
- University Gold Medal for outstanding academic achievement, BITS Pilani 2011
- GE Innovation Award, John F. Welch Technology Centre, General Electric 2010
- University Merit Scholarship, BITS Pilani 2007-11
- Travel Grants from NSF, IEEE, ACM, Microsoft, UIUC: approx. total of $5000 2014-18
Contact details
My email ID is raghav.pothukuchi {AT} yale {DOT} edu.